In general, a message-passing computer system is a parallel computer system in which a plurality of nodes operate cooperatively each other by interchanging messages through an interconnection network. As each node in the message-passing computer system receives and sends messages via the interconnection network, the latency and bandwidth of the message are important design considerations which affect the performance of the message-passing computer system.
Various topologies in interconnection networks have been developed and designed actively from various design points, and the interconnection network is effectively used not only in the message-passing computer systems but also in shared-memory multiprocessor computers. A network interface, a hardware apparatus for functioning as a bridge to connect a node to an interconnection network, must be designed to perform a function to receive and send messages to an interconnection network, minimize the latency of message and maximize the bandwidth of message.
A crossbar interface for a data communication network was developed by W. F. Hedberg, et al. in Digital Equipment Corporation. It is known from U.S. Pat. No. 5,261,059. The mentioned invention is concerned with an interface between the host computer and the crossbar switch and is designed to provide data buffering using an RAM device. A receive and send data are stored in or read from an RAM via a separated individual serial port. At the same time a local processor located within the crossbar interface can make an access to the RAM via a parallel port asynchronously with the serial port.
In the above invention, the local processor is the subject to perform a transfer protocol and a transmit controller neighboring the crossbar swith acts as some part of function to transmit data directly. In the invention, a data transmit interface and a data receive interface are designed to be integrated into one, the local processor controls an overall data receive and send and buffer management, the transmit controller functions to transmit data directly to the crossbar switch, and the receive controller functions to receive data directly from the crossbar switch. In the invention the local processor controls both the transmittance and the reception by integrating the data transmit interface and the data receive interface. However, in order to maximize the transmit and receive rate, the transmittance must be performed independent of the reception by separating the transmit interface and the receive interface independently.
Also, in the invention the local processor located within the crossbar interface controls the transmittance and reception of the data. Therefore, as the local processor performs a program, there exists a problem in increase of message transfer overhead. However, if all the transmit controls are integrated and performed in a dedicated hardware without using an additional processor, the message overhead can be minimized.
D. S. Henry and C. F. Joerg disclosed a paper about a tightly-coupled processor-network interface. The paper was published in the proceedings of 5th International Conference on Architectural Support of Programming Languages and Operating Systems, pp. 111-122, Boston, Mass., October 1992. According to their analysis, the interface between the processor and the interconnection network must be designed to minimize a software overhead in the communication between nodes.
Most of the network interfaces presently used can be classified into two types; a memory-mapped interface and a Direct Memory Access(called DMA thereinafter)-based interface. A message send in the memory-mapped interface is initiated when the processor executing a program to stores a sending message directly into a buffer located within the network interface and requests to send the message, and the network interface sends immediately the message stored in the buffer. When the message arrives from the interconnection network, the network interface activates an interrupt to the processor to notify the arrival of the message, and the processor begins to read the message stored in the buffer. A processor polling method may be used instead of an interrupt method.
Systems using a memory-mapped interface include MDP Machine, CM-5, MIT Alewife etc. As addresses are allocated to the message buffer to which the processor can make an access, the processor can make an access to the message buffer as it makes an access to the memory.
A message send is initiated when the processor executing a program prepares a sending message in the main memory and then requests the network interface to send the message, and the network interface reads the sending message from the main memory in a DMA transfer method and then sends it to the interconnection network. When a message arrives from the interconnection network, the network interface stores the arrived message into the main memory in a DMA transfer method and then interrupts the processor to notify the arrival of the message. Systems using DMA-based interface include NCUBE, iPSC/2 etc. These systems receive and send the messages through DMA transfer between the main memory and the network interface. The DMA transfer is implemented at a hardware level.
The cited systems support only one of the memory-mapped transfer method and the DMA-based transfer method. However, it is required to support both of the methods for an efficient message transfer. Also, in order to provide the user with flexibility, it is required to have a function that assigns selectively one of the two transfer methods within a software program according to the message characteristics(message location, transfer amount, etc.).